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This section describes the overall architecture of the ACIS Flight Software. Since the ACIS hardware supplies two types of processor sections, a Back End Processor and the Front End Processors, the software is split into corresponding sections.
The Back End Processor software has the following responsibilities:
The Front End Processors' software have the following responsibilities:
Figure 1 illustrates the key processors and devices within ACIS, and shows the key activities of the indicated processors. Figure 2 illustrates the key software components residing in the Digital Processing Assembly (DPA).
FIGURE 1. ACIS Processor Diagram
FIGURE 2. Software Block Diagram
The Back End Processor software is organized into layers (or, using Booch nomenclature, categories of classes). These layers are organized around the following types of items:
This type of organization provides some degree of flexibility when assigning programming tasks, helps testing, and helps prevent changes in one area from having a large impact in another.
The Back End Processor Boot ROM is a stand-alone software item which is responsible for loading other software into the Back End Processor RAM, and for transferring control to the loaded software. The hardware transfers control to the Boot ROM after a commanded or Watchdog reset, and at power-up.
The Hardware Devices layer is responsible for direct interactions with the ACIS hardware. This software encapsulates the physical hardware and provides a consistent interface to the rest of the instrument software.
The Executive Control layer contains the task scheduler, and provides some memory management, inter-process queue management, and semaphore management facilities. This layer is implemented using a Commercial Off-The-Shelf software package.
The Protocol Management layer is responsible for managing commands and telemetry, and commanding the Detector Electronics Assembly's subsections and the Front End Processors. This layer deals with the details of the various command, telemetry and inter-processor and device communication formats.
The Data Processing layer contains the science processing, DEA housekeeping, and software housekeeping elements. The elements of this layer act as the centers of most of the science and housekeeping requirements.
The Utilities layer provides software elements which provide services to all of the other layers, or which do not easily fit into the other software layers (such as patch-installation).
Figure 3 illustrates the dependencies between these layers. In this diagram, a box indicates a software layer (or category), a double line shows dependencies between two layers, and the circles indicate which layer uses the dependency (for example, the Protocol Managers depend on the facilities provided by the Hardware Devices). The word "global" in the Utilities box indicates that everyone may depend on this layer's services.
FIGURE 3. Back End Software Layer Diagram
The Back End Processor's Boot ROM contains a stand-alone boot-strap loader. This loader provides the following features:
The Boot ROM software is given control when the Back End Processor is reset, either by power-up, command or via the Watchdog Timer. Upon reset, the Boot ROM initializes the CPU registers, and then reads the "boot-mode" flag set by a discrete command to the hardware. If the flag indicates a normal load from ROM, the Boot ROM software loads code and data from the Back End's Software ROM, and executes the loaded code. If the flag indicates an "load from uplink", the loader waits for packets provided by the uplink channel. It then loads the code and data contained within the sent packets, and transfers control to the loaded code. Figure 4 illustrates the overall execution flow of the Back End Boot ROM.
FIGURE 4. Back End Boot ROM Overview Flow Chart
During this process, the Boot ROM indicates the current state of the boot via the discrete status provided by the Back End hardware.
The Hardware Device layer contains all of the software which directly manipulates the ACIS hardware. The hardware interfaces can be organized into the following groups:
The Command Interfaces are managed by a collection of Command Device software elements. These software elements read serial command packets from the hardware interface, and provide access to the Radiation Monitor, Watchdog Reset, Boot-Mode and Diagnostic command flags.
The Telemetry Interfaces are managed by a collection of Telemetry Device software elements. These elements command the telemetry downlink transfer controller (DTC) to transfer telemetry packets to the RCTU Serial Telemetry Port. They also provide access to the discrete telemetry status signals.
The Detector Electronics Assembly (DEA) Interfaces are managed by a collection of DEA Device software elements. These elements issue commands to the DEA via the DEA command port and read responses to the commands via the DEA status port. These elements also provide access to the latched version of the ACIS time-stamp, set at the start of a Science Run.
The Front End Processor (FEP) Interfaces are managed by a collection of FEP Device software elements. These elements issue commands to the addressed Front End Processors, retrieve status from the processors, and transfer data from the processors.
The Timing Interfaces are managed by a collection of Timing Device software elements. These elements provide access to the Watchdog Timer, and to the general purpose timer.
The Back End Processor is responsible for concurrently managing several I/O interfaces as well as performing some science data processing and housekeeping operations. In order to make the management of these tasks easier, the Back End Processor software uses a preemptive multi-tasking executive to manage several concurrently running tasks. This executive provides the following services:
Although the ACIS software uses a commercially available executive, the ACIS software will provide an interface layer to the purchased software. This layer serves to isolate the rest of the ACIS software from the details of the purchased interface and to assist in generating stubs during testing.
The Protocol Management layer is responsible for handling command execution, merging telemetry packets into the telemetry stream, controlling the Detector Electronics Assembly, and controlling the Front End Processors. This layer provides the following services:
The Data Processing layer is responsible for acquiring software housekeeping information, acquiring Detector Electronics Assembly housekeeping, and for processing data obtained from the Front End Processors during a science run. This layer provides the following services:
The Utilities Layer is responsible for providing services common to all of the other layers, and for providing software which does not logically fit into any of the other categories. The Utilities Layer provides the following services:
The Front End Processor (FEP) software is organized into the following software layers:
The Front End Processor Boot RAM is a stand-alone software item, loaded into a dedicated region of shared memory by the Back End Processor. This loaded software is responsible for copying science or diagnostic software from the remaining Back End Processor shared memory region into the Front End's Instruction and Data cache RAM, and for transferring control to the loaded software. The hardware transfers control the Front End Boot RAM after the Back End Processor releases the Front End's reset line.
The copied science software image consists of the I/O Library and Data Processing software.
The I/O Library software is responsible for providing routines which manage communication with the Back End Processor during a Science Run or while performing diagnostics. These routines are also responsible for handling memory commands from the Back End Processor. Some of the features provided by these routines are redundant with those provided by the Front End Processor Boot RAM, except that these FEP routines can be used during science data processing.
The Data Processing software is responsible for performing bias computations (including overclock) on the CCD data, and for searching for likely events in the raw data. Most of the science requirements are directly reflected by this software.
Figure 5 illustrates the dependencies between these layers.
FIGURE 5. Front End Software Layer Diagram
The Front End Processor's Boot RAM contains a stand-alone boot-strap loader. This loader provides the following features:
The Boot RAM software is given control when the Front End Processor reset line is released by the Back End Processor (NOTE: Watchdog resets on the Front End re-assert the reset line. It is up to the Back End to detect the condition and reload the Boot RAM and release the line). Upon reset, the Boot RAM initializes the CPU registers. The Boot RAM software then loads code and data from the Back End shared memory interface, and executes the loaded code. Figure 6 illustrates the overall execution flow of the Back End Boot RAM.
A maintainer can patch the software loaded into the Front End Processors by modifying the images in the Back End memory before they are loaded into the Front End Processors.
FIGURE 6. Front End Boot RAM Overview Flow Chart
The Front End Processor I/O Library provides a common set of routines which handle commands and data to and from the Back End Processor. This library provides the following services:
The Data Processing software layer is responsible for executing science or diagnostic operations needed for the current science operations. This layer provides the following services:
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