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Each CCD chip is provided with 4 low-noise amplifier nodes. These are critical for obtaining the best energy-resolving performance of the CCD. These nodes are the limiting source of noise if the rest of the system operates ideally. Physically, the detection node is implemented as an implant within the signal transfer channel, which is connected to the gate of a MOSFET source-follower amplifier. The potential of this node is set to a high positive reference voltage by a second MOSFET switch. When the switch re-opens, signal charge is dumped from the last serial register electrode onto the node and, due to the small capacitance of the MOSFET gate, there is a measurable voltage change developed across the external load of the MOSFET source follower stage.
The off-chip circuits amplify this signal, with a general technique of comparing the samples of the reference voltage level and the signal voltage levels. The differencing process tends to reduce low frequency components that are common in MOSFET amplifiers; white noise components are minimized by proper choice of the circuit bandwidth. However this bandwidth tends to place a limit on the speed of operation of the chip (seconds per pixel). The equivalent noise charge of these amplifier nodes can be of the order 2 to 3 electrons r.m.s. in this mode. A typical keV X-ray would generate an off-chip signal of mVolts, so the noise in the off-chip circuits must be kept very low as well.