[CSR]
ACIS-DD-134
NAS8-37716
DR SMA03

[AXAF-I]
[ACIS]
Advanced X-ray
Astrophysics Facility

AXAF-I
CCD Imaging Spectrometer

ACIS Monthly Progress Report

JULY 1996

Submitted to: Submitted by:
George C. Marshall Space Flight Center
National Aeronautics and Space Administration
Marshall Space Flight Center, AL 35812
Center for Space Research
Massachusetts Institute of Technology
Cambridge, MA 02139


1.0 General

This report covers the period July 1996.

1.1 Accomplishments

1.1.1 Program Management

Meetings

A monthly review for ACIS was conducted at MIT on July 10. Since the main topic was the recent failures with the CCD assemblies and the implications to the overall ACIS schedule, Lincoln Lab supported this review with Al Pillsbury, and Lockheed Martin attended with Ed Sedivy, Pat Roberts and Phil Bontemps. The MSFC staff in attendance were Nes Cummings, Max Rosenthal, Tony Lavoie, Ken Reed and Buddy Randolph. Paul Plucinski represented the SAO ASC. Claude Canizares, George Ricker, Mark Bautz and Gordon Garmire represented the ACIS team. The next review will be held on August 20, 1996.

A schedule review was held with LMA on July 9. The main topic was the latest ACIS project plans that would be presented to MSFC the following day. LMA concurred with the MIT plans and the discussions with MSFC on the afternoon of the 10th resulted in the following plan: MIT would proceed to LMA in early October with the flight DEA, DPA, and Support Structure, but with the Engineering Unit Detector Assembly. At LMA, experiment integration would be conducted, EMI/EMC testing performed, and finally 1238 bakeout and certification at BASD in December. In the meantime, the flight focal plane would be integrated into the detector assembly in early December, vibration tests conducted in late December, integration with the rest of the flight hardware (upon return from Denver) in early January, and finally a full up Thermal Vacuum test of the entire ACIS experiment at Lincoln Lab in February. The ACIS experiment would be delivered to XRCF by March 15, 1997.

The story of the CCD failures has sort of stabilized. During July, many (~ 80) failures were observed as a result of thermal vacuum testing of six CCD assemblies at Lincoln. All of these failures were related to vias. By now, it is certain that the problem is caused by stresses in the copper of the plated through holes of the vias, and the vias are literally pulled apart by thermal cycling. The cause is undoubtedly the use of acrylic adhesive in the rigid portion of the flex that experiences the -120°C extreme, and is probably exacerbated by the poor workmanship of the flexprints from Flex Technology.

The recovery plan has several parallel paths. First and foremost is the fabrication of a new lot of flexprints by Speedy Circuits (due to the quick delivery by this company). The design has been only slightly modified - elimination of the acrylic adhesive and the bottom cover layer. As a back-up to Speedy Circuits, an order has been placed for identical units from Graphics Research. As plan B, Lincoln Lab has designed a new version of the flexprints which have no vias at the cold (CCD) end. This design was reviewed at mini design reviews on July 29 with MIT scientists and July 31 with experts from MSFC, GSFC, and the EIRR (Marc Daigle). This new design will be completed and units ordered during the first week of August.

Telecons

MIT participated in the AXAF project level telecons on July 2, 9, 16, 23 and 30.

MIT participated in an ACIS bi-weekly status review on July 24. The review normally scheduled on July 10 was held in person at MIT as part of the Monthly Review.

ACIS Schedule

The ACIS schedule is dominated by the refurbishment of the CCDs, which in turn is predicated on obtaining flexprints that can undergo the thermal cycling expected on orbit. As discussed above, two plans are in place, and the first set of new flexprints are due from Speedy Circuits in early August.

Once reliable flexprints are obtained and tested, the next task is to replace the flexprints on the CCD assemblies that have already been calibrated. With this in mind, procedures have been developed and tested for replacing flexprints at Lincoln Lab. At CSR, the ACIS science group has hired a team of students and has been calibrating additional CCD assemblies since early July so as to increase the inventory of calibrated devices (the yield on any CCD packaging activity, new or refurbished, is not 100%). Unfortunately, the re-flexed units will not be available for re-calibration before September 1 when classes resume. Therefore, a `fall' calibration team is being hired and trained. In addition, a set of improvements to the calibration facilities have been identified, and implementation begun, which will allow for a more rapid re-calibration when the refurbished units are available.

The following is a brief summary of the status of the ACIS elements:

(a) The initial CCD calibration was completed on about June 15. This activity will be repeated starting about September 1 and last about 8 weeks.

(b) The DEA Analog Boards have all been loaded and tested. Twelve units are available (we fly 10). We will begin the conformal coating operation in early August.

(c) The DPA design is complete. However, we are still testing the ACTEL programs in the FPGAs on the FEP and BEP. The FEPs have been loaded (less ACTELs). One unit has had its FPGAs installed and is under test with the rest of the DPA and the DEA.

(d) The Optical Blocking Filters have been tested at PSU. Although it appears they just meet specification, given the delay due to the CCD problem, additional units are under fabrication at Luxel, Inc.

(e) The third (Rev C) engineering board of the DEA Interface and Thermal Control Board was received at the end of July and is in the process of being loaded. The flight units of these boards are in fabrication at Speedy Circuits.

Project (CCD) Status

The ACIS project status depends on the success of the fabrication of new flexprints for the CCDs, as discussed above. In the meantime, it is obvious that ACIS will not be available for the start of XRCF. Based on the discussions with MSFC on July 10 and 11, the ACIS project has re-allocated significant resources to assure that the ACIS-2C will be delivered in time for the start of the dry-run in September. These resources include: a mechanical technician, an electrical technician, the GSE engineer, and a System Engineer. By July 31, the ACIS-2C was assembled and working and will be shipped to MSFC in the first week of August.

Scheduled `end of project' layoffs for July 30 were postponed due to the re-planning described above. In particular, the MSFC review team from the software test readiness review (conducted on July 8 and 9) recommended that the MIT software test team be kept on the project as long as possible. In addition, the departure of Bob Renshaw from ACIS has been delayed due to the need to support the AXAF mockup procedures meeting at BASD in early September.

1.1.2 Science

The ACIS Science team accomplished the following activities during the reporting period:

a) CCD Calibration. As part of the flexprint recovery plan, the CCD calibration lab performed the following measurements:

  1. A replacement (but old design) flexprint was installed on a previously calibrated CCD assembly. This unit was then re-calibrated to determine if any significant changes had occurred. None were found. The re-flexed unit had an overall gain shift of 2.5% which is well within the 5% spread seen for the units calibrated last spring.
  2. A previously screened, but uncalibrated, unit was characterized and delivered to Lincoln Lab on July 30 to be used as one of the first units to receive the new flexprints. A successful calibration of this unit is part of the overall verification plan for new flexprints.
  3. The CCD experts in the ACIS science team participated in the alternative flexprint design review at LL on July 29.
  4. Using MIT students, the CCD calibration lab continued to calibrate additional units (all with old flexprints). It is expected that all previously packaged units will be calibrated by about mid-August.

b) The science team has begun to plan for the CCD re-calibration which will begin in early September. As part of this planning, the team has identified a total of eight hardware additions or modifications which will allow for a rapid re-calibration of the re-flexed units received from Lincoln. These include: repair and modification of a test set, fabrication of an additional test set, fabrication of a replacement cable in one of the calibration chambers, modification of calibration chamber to hold two CCDs simultaneously, additional computers, and additional data storage systems.

c) Working with Gordon Garmire at PSU and Forbes Powell at Luxel (who has returned from his long vacation in Alaska), the science team helped to identify alternatives to the current specification for Optical Blocking Filters. Three test units have been ordered from Luxel: two spectrometers (one with 2000 A of polyimide and the other with 2500 A of Lexan) and one polyimide imager. These units are due for delivery by mid-August.

1.1.3 Hardware Design

1.1.3.1 Detector Assembly / Integrating Structure

Calibration Sources

The ACIS Contamination Monitor (Door Source) flight unit is with the scientists for testing. The External Calibration Source flight unit is at BASD for a fit check.

Back Plate Assembly

All of the flight Back Plate Assemblies have been modified with nine tapped holes each to mount the cable brackets.

Proton Shield

The parts of the Proton Shield are complete. Several pieces had been marked with ink and have been baked out successfully. One piece needs modification to fit properly.

Support Structure

Assembly of the EU support structure is complete. The Flight Unit + Y and -Y Panels are having the EMI gasket grooves machined and all panels need cleaning and painting.

LED Assembly

The flight unit is being assembled.

EU Detector Assembly

The unit has completed all presently scheduled mechanical and vacuum tests. It is available for electrical testing with the DEA and DPA. It will be up-graded to a more flight like configuration (heaters and thermistors) in mid October.

Mechanical GSE

The XTE ASM shipping container has been modified for use as required. It is being used to ship ACIS-2C. A hoist has been received and will be modified for use with ACIS.

ACIS-2C

Our mechanical technician has been assisting in the completion of ACIS-2C.

1.1.3.2 Electronics Packaging

Printed Wiring Boards

The Heater Control and Interface A and B Circuit Card Assemblies have been revised and released.

Enclosures

Tantalum shields have been attached to the Detector Electronics Assembly -X Cover and +Z panel. The panels will be thermally cycled from -40° to +80°C prior to painting.

The design of the alternative aluminum frames for the DPA has been completed. A structural analysis of the new design was performed to determine the natural frequencies and compatibility with the existing design of the Support Structure. MIT is searching for alternative machine shops to complete the beryllium frames within the overall ACIS schedule.

Cables

Internal cable drawings of the DPA and DEA have been drawn. The drawings are now in engineering review.

Support of the assembly of the DPA and DEA is continuing with ECO activity.

1.1.3.3 Thermal

After several months of effort, the ACIS TV Test Procedure, Rev. 01, was distributed for comments to MIT and LMA personnel. Further revisions will add the PSMC to the test articles.

An analysis was performed to assess the thermal impact of attaching a cable bracket to the DPA to support the survival heater cable. The impact of less than 0.5°C increase in hot case temperature is acceptable.

The ACIS TV Test thermal model is under revision to accommodate addition of the PSMC in the TV chamber. The PSMC support plate configuration and heater panel requirements will be specified upon completion of the analysis.

Participated in the Thermal TOP Telecon on July 18.

1.1.3.4 Analog Electronics

For this reporting period, testing of the DEA system is concentrating on the top level command directives from the DPA. These commands are simulated by the GSE software. The extent of these tests include the assertion of power to all video card systems collectively(broad cast) and individually. Further, all video systems on the backplane are commanded to generate dummy load images.

By virtue of the above test, a full compliment of the DEA engineering system will have been established. When this occurs, the commanding and image acquisition will then transfer to the FEP and under flight software control. We are expecting this to occur at the next reporting period.

1.1.3.5 Digital Processor

Six engineering FEPs, all loaded with the latest Actels are up and running in the lab. Two more are being loaded with Actels, and will be tested shortly.

The first flight FEP (containing flight Actels) has been successfully tested (including both frequency and voltage margining) in single-board mode. System testing (with backplane and BEP) is next, probably today.

The Engineering DPA has been re-integrated to the DEA, which now includes the "11th card". We have also closed the loop by returning pixel data back to the DPA, and are currently system testing the DEA, DPA and flight software as a unit.

We hope to load the flight BEP with a flight Actel this week. We still have not tested with an official RCTU/CTU simulator. This is a serious concern as we continue on with the flight build.

1.1.3.6 Ground Support Equipment

In-house functional test and thermal vac test (vacuum-side harnesses excluding W1 and W2) have been fabricated and are currently being baked out. Harnesses for the thermal vac ambient side have been kitted and sent out for fabricaation.

The harness design for thermal vac using the flight PSMC is being reviewed. It is expected to have little, if no impact, on the harnesses that have been fabricated to date.

Supported ACIS 2-Chip system assembly and pre-ship functional testing.

1.1.4 Software

Software Specifications

As a result of ECO 36-623, minor changes have been made to the ACIS Software Requirements Specification and to ACIS IP&CL structures - specifically the inclusion of an "initial exposure skip" field in science parameter blocks.

Detailed Software Design

Reviewed ECOs relating to the following software modules:

Work continues on BEP code to verify the PRAM/SRAM loads, guarding against a possible overload of the CCD driver circuitry.

External Interfaces

Received a draft version of SE17 from TRW, describing the format and contents of AXAF IP&CL. The following documents have been published via the ACIS public internet site ("ftp://acis.mit.edu/pub/"):

Test Readiness Review

The review board met at MIT on July 8-9. The following action items resulted:

Software Delivery

Updated flight software and UNIX simulator code to reflect ECO 36-623.

Unit Testing

All BEP and FEP flight software modules continue to be subjected to unit and coverage tests.

Integration Testing

Flight software has been successfully loaded into the BEP and FEP engineering units and both low- and high-level testing has begun. Testing continues with the UNIX software that simulates BEP and FEP. 6 new software problem reports have been filed. All but one of the prior problem reports have been closed out. All software test tools have been updated to reflect the changes in ECO 36-623. Rita Somigliana and Jonathan Woo continue to work with the ACIS Test Group to develop software test tools and procedures.

Personnel

Dr. Fred Baganoff, a post-doctoral research scientist at MIT, is joining the flight software testing group to work half-time on science-mode testing.

1.1.5 Performance Assurance

1.1.5.1 Quality Assurance

Alerts

No Alerts have been received over the report period.

Alert EA-P-96-01 (6948) and Alert VV-P-96-01 (6952) were re ported last month as alerts which are applicable to MIT/ACIS. MIT has responded by letter to MSFC, Ed Trentham, on these alerts.

Bonded Stock

Generated the following complete kits:

Thermal Control Board (A) (36-20202) 1 kit Serial #3
Thermal Control Board (B) (36-20262) 2 kits Serial #2 and #3
Cable assembly (FLT) (FLT) 10 kits

Source Inspection

Performed final source inspection at Q Tech on flight Crystal Oscillators.

Incoming Inspection

Received five DEA and DPA panels that were sent to Boyd Coatings for application of the black paint. One panel was rejected and sent back to Boyd for rework.

Received the one panel that was painted white by ITT. The panel has paint in the holes which will require rework to remove the paint. Rework will be attempted in-house.

Inspection rejected tantalum shield, 36-30210.0402. The drawing was ECO'd to reflect the part.

Inspection rejected the external calibration source holder, 36-40201.01. The part will be remade

MRB accepted the +Y support structure that had an elongated hole, undersized counter bore holes, and non-flush fillets.

Part Screening and PWB Coupon Testing

Sent one (1) lot of twenty-one (21) pieces of JM38510/32403BSA to ATL for PIND, X-Ray & DPA testing.

Sent four (4) rigid-flex circuits coupons to HI-REL for cross section analysis.

Sent five (5) printed circuit board coupons, 36-30202.01 to HI-REL for cross section analysis.

1.1.5.2 Parts Engineering

NSPAR Status

NSPAR # Part Submittal Approval
36-001 Mongoose Microprocessor
080-000001-001
3/9/94 3/15/94
36-002 A to D Converter
36-02301
8/3/94 10/19/94
36-003 CA Memory Module
36-02302
8/19/94 10/6/94
36-004 FB Memory Module
36-02303
8/19/94 10/6/94
36-005 Programmable Supply current
Op Amp 36-02304
11/8/94 11/17/94
36-006 Operational Transconductance
Amplifier 36-02305
11/8/94 11/17/94
36-007 Electrically Erasable
Programmable Read
Only Memory 36-02306
12/12/94 12/21/94
36-008 Electrical Connectors, PCB
Mount SND Type
5/2/95 5/30/95
36-009 Electrical Connectors, PCB
Mount KA Type
5/2/95 5/30/95
36-010 Electrical Connectors,
Micro-D
5/5/95 5/30/95*
36-011 Electrical Connectors,
SGM Type
5/5/95 5/30/95
36-012 Junction Field Effect Transistor
(JFET) (36-02309)
5/24/95 6/9/95
36-013 Dual Surface Mount Diode
(Plastic) (MMBD7000)
5/24/95 6/9/95*
36-014 Dual Operational Amplifier
(OP220A) (36-02307)
6/2/95 6/14/95
36-015 8000 Gate Anti-fuse Field
Programmable Gate Array
(1280A)
6/26/95 7/12/95
36-016 MS27505E Connectors
8/24/95 9/12/95
36-017A Charge Coupled Device
(CCD) (36-02308)
10/6/95 11/30/95
36-018 Microcircuit, Octal Buffer
(Harris ACT244)
10/15/95 11/30/95
36-019 Microcircuit, Octal Bus
Transceiver (Harris HCS245)
10/15/95 11/30/95
36-020 Microcircuit, Octal-D
Flip-Flop (Harris HCS374)
10/15/95 11/30/95
36-021 Microcircuit, Quad.
Differential
Line Driver (Harris HS26C31)
10/15/95 11/30/95
36-022 Microcircuit, Quad.
Differential Line Receiver
(Harris HS26C32)
10/15/95 11/30/95
36-023 Crystal Oscillator
Q-Tech part type
QT25HC10-38.4 MHz(36-02311)
12/4/95 1/10/96
36-024 Capacitor, polypropylene
WIMA P/N FKP2 (36-02312)
2/7/96 CANCEL
36-025 Wire, Electrical, Nickel
Wirecraft P/N E267U9N
(36-02313)
3/5/96 3/18/96
36-026 Connectors, Electrical
MIL-C-83503/7-04
MIL-C-83503/25-11
3/11/96 3/29/96
36-027 Wire, Electrical, Nickel
Specialty Cable AWG26
(19/38) (36-02314)
3/27/96 4/1/96
36-028 Capacitor, polypropylene
WIMA P/N FKP2 per
CECC 31 800
3/29/96 4/11/96
36-029 Connector, Electrical
(3M-20 pin Connector/Header)
5/20/96 7/22/96
MMA/
ACIS-014A
Microcircuit, Rad Hard
Power MOSFET
4/4/96 4/22/96
MMA/
ACIS-018A
Relay, Latching, DPDT, 5A 4/4/96 4/22/96
MMA/
ACIS-023A
Diode, Rectifier 4/4/96 4/22/96*
MMA/
ACIS-038A
Microcircuit, Logic, HC 4/4/96 4/22/96*
MMA/
ACIS-039A
Diode, Rectifier, Schottky 4/4/96 4/22/96*
MMA/
ACIS-041A
Transistor, Power Switching 4/4/96 4/22/96*
MMA/
ACIS-043
Resistor, Precision, Low TC 4/4/96 4/22/96
MMA/
ACIS-045
Thermistor, Precision,
Miniature
4/4/96 4/22/96
MMA/
ACIS-046
Temperature Sensor,
Platinum
4/4/96 4/22/96
MMA/
ACIS-047
Magnetic Devices -
Transformers and Inductors
5/16/96 7/2/96
* Approval is conditional

Lockheed Martin Astronautics (LMA) has one (1) more NSPAR in process at LMA.

1.1.5.3 Reliability Engineering

Radiation testing has been completed at Space Electronics Inc. (SEI) on twenty-two (22) device types. Results of these tests are listed below.

Manufacturer Part Number Radiation Test
Results
Crystal
(Interpoint)
CS5012A 6K Rads
Analog Devices DAC8800BR/883 <2K Rads
Micron
(Teledyne)
MT5C1005
(36-02303.2xx)(ENG.)
50K Rads
Micron
(Teledyne)
MT5C1005
(36-02303.3xx)(FLT)

Com Linear CLC505A8D >100K Rads
Harris (Chip Supply) 36-02305 (CA 3080) <100K Rads
Analog Devices OP220AJ/883 (TO-5 can)
(Test Only)
8K Rads
Analog Devices
(Chip Supply)
OP-220 (DIP)
(36-02307)(FLT)
< 20K Rads
Texas Instruments TL082/883B >100K Rads
Harris M3851010504BEA
(IH5143)
6K Rads
Harris M38510/19005BEA
(HI548)
>100K Rads
Siliconix U310-2 80K Rads
Analog Devices REF43BZ/883 >200 K Rads
NSC 5962-8777801XPA
(LM195)
>100K Rads
NSC M38510/76203BEA
(54AC157)
27K Rads
NSC M38510/10103BGA
(LM101A)
12K Rads
NSC 54AC374DMQB 11K Rads
Motorola M38510/30004BCA
(54LS05)
>100K Rads
Motorola M38510/31302BCA
(54LS14)
>100K Rads
NSC M38510/32403BRA
(54LS244)
> 100K Rads
Motorola M38510/32803BRA
(54LS245)
> 100K Rads
White WS-128K32-25HQE 88K Rads
NSC 54AC74DMQB
NSC 54AC109DMQB

Devices which have not passed 100K Rads of Cobalt 60 testing will be shielded or design work-arounds will be implemented. Two (2) more device types are planned for radiation testing. These are listed above without results.

Cross-section failure analysis was performed on one flight CCD/flexprint assembly by Hi-Rel Labs in Spokane, WA. This confirmed what had been theorized through fault isolation and finite element analysis. A circumferential crack in a via was caused by acrylic adhesive in the rigid portion of the rigid/flex circuit. This rigid/flex circuit has been redesigned and will undergo qualification/life tests after the new circuits are fabricated. In addition, extensive lot acceptance will be performed on each panel of new rigid/flex circuits.

Engineering evaluation Optical Blocking Filters (OBFs) have been ordered from Luxel. They are due by August 16. After PSU evaluation, Luxel will fabricate new flight OBFs which have already been ordered but not yet fully defined. It is most likely the new OBFs will be polyimide instead of lexan.

1.1.5.4 System Safety

Sent original KSC form 16 to Hal Hooper.

The MIT license to handle radioactive sources does not include CM244 . Have asked for a new license so that it can be sent to MSFC.

1.1.5.5 Software QA

The following items were produced or worked on during the reporting period:

Test tool software developed by software QA was enhanced to automatically detect user machine and user prompts. Software was placed in Test Tools directory.

Much time was spent with hardware and software designers to understand DPA/DEA interface. Very little is formally written. Software QA has developed sample documentation form.

There were 3 new Software Problems Reports generated.

In process of updating VRSD with respect to verification of CEI items relating to software.

1.1.5.6 Performance Assurance and Safety Plan

There has been no activity on the Performance Assurance and Safety (PAS) Plan. The PAS Plan in effect is revision B.

1.1.5.7 Contamination Control
Cleaning

Completed the installation of the shroud into the thermal vacuum chamber at ATC, in Chelmsford. The chamber was cleaned and pumped down on Friday August 2. Further evaluation is needed to determine cleanliness.

Three Flight FEPs, 2 PDUs, 1 DPA Backplane, and 1 DEA Back plane were vacuum conditioned for 10 days at 99°C.

The first five thermal vacuum test cables are in final bakeout at Lincoln Laboratory. TQCM readings are 12 Hz/hr at 80°C.

The second set of thermal vacuum test cables were preconditioned at Lincoln Laboratory and contaminated the chamber. Further investigation revealed that the backshells were zinc plated, which is not preferable in vacuum. The backshells were removed and the cables put into a thermal vacuum chamber at NTS for further vacuum conditioning.

Cleaned and vacuum conditioned flight DEA internal harnesses.

Located another thermal vacuum chamber that is available at Lincoln Laboratory. The only item that is needed is an 11" to 9" ASA adapter, which is due in on August 13.

Cleaned the engineering DEA and DPA panels for flight harness fabrication.

Cleaned the following items; inserts for the support structure, 3 tantalum shields, the flight DPA internal harnesses, the flight contamination monitor collimator, and other miscellaneous parts.

The Flight internal contamination monitor was assembled with a 2 micro curie Fe55 source for testing by Mark Bautz. The Fe55 source required a shim to offset a recess on the source.

The PWA holding fixtures were cleaned and vacuum conditioned.

The vapor degreaser is operational along with the HEPA filtered oven. The HEPA filter oven is within Class 100 specifications, per FED-STD 209.

Made 3 stainless steel mesh baskets for the vapor degreaser.

Made and cleaned 6 frames to support various types of flight tapes during vacuum conditioning.

1.1.6 CCD Development and Packaging

The June progress report described a problem which had developed in the flexprint circuits that are bonded to the CCD detector assemblies and act as the electrical connection to the read-out electronics. Electrical opens develop at the vias during thermal cycling. Initial evidence suggested that only one or two lots (out of 5) were vulnerable to this damage. Subsequent testing has established that flexprints from all of the lots are vulnerable to this failure and are not suitable for flight use.

Two detector assemblies that have experienced via failures have been sectioned to establish the failure mechanism. The first detector (mentioned in previous progress report) developed an anomaly during testing at CSR. Sectioning performed by an independent laboratory indicates that the failure is a circumferential crack between layers 1 and 2. The open circuit is not a result of the barrel separation problems that were seen on the coupons associated with this flexprint circuit. A second detector assembly (non-flight grade) was sectioned after 19 vias were made to fail by thermal cycling 59 times between -150°C and +60°C. These failures were also circumferential cracks between layers. In all cases the failures are consistent with excessive strains being developed by the very high coefficient of thermal expansion of the acrylic adhesive used in bonding together the various layers.

Additional non-flight detectors have been thermally cycled and show high failure rates. Electrical probing of these devices confirms that the failure is located in the vias. Additional assemblies will be sectioned to confirm that there is only one failure mode present.

Contracts have been awarded to three different flexprint vendors for fabrication of flexprints with no (or very limited) acrylic adhesive. Additional changes to the specifications and manufacturing process have been made to further improve the durability of the vias. The first of these flexprints were originally expected to be delivered by 30 July 1996. Fabrication delays have pushed expected delivery back to 2 August 1996.

As a proof-of-concept test a flexprint with very little acrylic has been subjected to accelerated testing. This flexprint was fabricated by the original vendor for a different customer. One end of the flexprint was alternately dunked in liquid nitrogen and placed in a hot air stream to warm the part to approximately 60°C. No failures were found after 200 such cycles. Multiple failures developed in original style flexprints when they were subjected to this test.

A qualification plan has been developed for the replacement flexprints. It includes three major efforts performed in parallel. These are: destructive testing of coupons and flexprints, thermal cycling over a qualification temperature range, and performance testing detectors with new flexprints.

Flexprints are fabricated on a panel that contains 12 flexprints. Each panel has four coupons that contain sample vias similar to those used for the connector attachment. The vendor performs a cross sectioning of one coupon per panel to determine if the panel meets the appropriate requirements. If it does the flexprints are shipped along with two remaining coupons. One will be sectioned at Lincoln Laboratory and one at an independent testing laboratory (Hi-Rel Laboratories in Spokane, Washington). In addition one flexprint from each panel will be cut lengthwise with one half being sectioned at Lincoln Laboratory and the other half at Hi-Rel. If any defect is found in either coupon or either half of the sectioned flexprint the entire panel will be rejected. In addition, there will be visual and electrical testing of all flight candidates and this may separate out single flexprints due to point defects.

Panels that have delivered flight candidate flexprints will have one flexprint per panel subjected to 200 thermal cycles over the qualification range of -150°C to +60°C in a vacuum bell jar. These flexprints will be bonded to an alumina substrate in a flight-like manner.

The flexprint will be wire-bonded to a resistor network (located on the alumina) that will allow continuity testing through each via. Equipment limitations require that the samples be removed from the bell jar for evaluation. This will be performed at scheduled intervals to evaluate the via condition. After cycling has been completed, representative samples will be sectioned for evaluation.

Two detectors will be assembled with the new flexprints while the thermal cycling proceeds. One of these will be a previously unpacked device while the second detector is an existing device that has been well calibrated. These two detectors will be sent to CSR for functional testing and evaluation.

After all three of these efforts have been completed a determination will be made as to the suitability of the no-acrylic flexprints. A failure in any of the tests may result in one panel being rejected (if it is a localized workmanship problem that can be screened) or may result in the rejection of the entire lot if the failure is determined to be the result of a design limitation.

Presently it is the vias located at the detector end (operating at -120°C) that fail during thermal cycling. An alternate flexprint design is being developed that will move all of the vias to the connector end of the flexprint which only cycles down to -60°C. These warmer temperatures can typically be tolerated by well designed flex circuits. This redesigned flex circuit would require a different outline but could directly substitute for the existing flex circuits. This alternate design will be fully pursued. The design package should be completed and awarded to a contractor by the first week in August allowing fabrication to be complete by the end of August.

Several mock-ups of the redesigned flexprint has been fabricated to evaluate two key concerns. Several of these pieces were bonded to alumina substrates (as required in the flight configuration) and weld schedules were successfully developed for the aluminum and gold wire bonding as required for front and back illuminated devices. Several samples were subjected to 200 rapid thermal cycles as described above. Well prepared samples did not exhibit delaminations or electrical opens as a result of this testing. These two sets of tests address the most significant mechanical design concerns with the new design. An additional sample is presently undergoing slow thermal cycling. It will be evaluated periodically.

An additional detector assembly (W192C3) has had its flexprint replaced to further evaluate the replacement process. The detector performance was characterized prior to and after the replacement and no detectable change was noted. Electrical testing at Lincoln Laboratory did detect high impedance shorts between Phase 2 and Phase 3 and the image array. This type of short would not be allowed on a flight device but did not impact the conclusion of this test and is typically caused by ESD damage. An additional device that has been more fully characterized will be tested with new flexprints prior to replacing flexprints on the flight devices.

Several devices from Flex Tech were subjected to thermal cycling this month. Three of them were cycled to destruction, that is, they were cycled until all four outputs on a chip were non-functional. In all cases where further fault tracing was done, the failures could be traced to a defective via on the flexprint. We have found that Lots 1 and 2 perform the best, with the only Lot 2 piece under test surviving 157 temperature cycles (there are no more Lot 2 flexes for bonding and only one flight part, BI W147C3 uses a Lot 2 flex). Lot 3 and 4 are quite poor, showing a 50% failure rate after about 35 cycles while Lot 5 is somewhat better, showing a 40% failure rate after 100 cycles. Regarding the sectors of the individual detectors, the vias in sector D appear to fail more rapidly than the other three, but all four sectors reach an 80% failure rate after 120 cycles, indicating that the Flex Tech parts are unacceptable.

It appears that the vias between layers 1 and 2 of the flex are the most likely to fail, with the vias between layers 2 and 4 the next most likely.

The vias connecting layers 1 and 4, layers 1 and 3, and layers 1, 2, and 4 are somewhat more rugged, but they still show an unacceptable failure rate. This helps explain the early failure rate of sector D since the vias between layers 1 and 2 predominate in that sector.

1.1.7 Martin Marietta Activities

During this month negotiations were completed for Change Orders 41, 43 and 46. The final update of the Change Order 48 proposal, relating to modifications of the PSMC to accommodate changes in the PSMC to SIM mounting interface was delayed. This delay resulted from an increase in the complexity on the PSMC design modification over that which was originally estimated. The increased complexity was defined as a result of the structural analysis of the change to the four point mounting interface requested by the SIM developer. The analysis showed that significant design modifications must be made to all four sides of the PSMC rather than just the base as originally estimated. The corrected update proposal will be submitted in early August.

LMA supported the ACIS NASA/MIT Monthly Status Review at MIT/CSR and provided technical and programmatic status. The primary focus of the re view was to replan flight systems test and integration activities, owing to continued difficulties with the of Focal Plane flex-prints. A replan was developed that provides the flight ACIS instrument delivery by a promise date of 15 March 1997.

Major accomplishments for July included; completion of the Vacuum Venting Subsystem assembly and environmental tests, completion of fabrication and fit check of the ACIS Science Instrument Module Simulator (SIM Sim) and custom shipping container, completion of the bakeout of the MIT Lincoln Labs Test Harness, completed and shipped the Spacecraft BUS Simulator to MIT, and completion of the assembly of flight Serial Digital Boards. The Zeiss coordinate measurement machine was repaired, recalibrated and the early alignment and measurement activities on the flight Detector Housing was performed. The proposed work around to use a Zeiss located in Colorado Springs was not implemented due to the additional cost with no real program schedule benefit of this approach.

The program reviewed inter-company Mission Success Bulletins and GIDEP ALERTS received during the month. None of these ALERTS were judged to be applicable to any of the parts or components being used by LMA on the ACIS program. In addition, there have been no items defined during the month nor during the course of the contract, to date, that have warranted generating a Contractor-Initiated ALERT.

The program continues to focus on flight hardware fabrication and testing and on resolving day to day situations to maintain schedule. However, significant problems were encountered during the month that will result in deferring work and schedule delays. These problems included: late delivery of EEE parts for the PSMC; difficulty in getting replacement parts that delayed the repair of the Lockheed Martin Astronautics (LMA) Zeiss coordinate measuring required to do the alignment of the Flight Detector Assembly; program personnel priorities delayed the analysis and subsequent redesign of the PSMC box structure to accommodate the change in the PSMC to SIM interface requested by Ball Aerospace and implemented by Change Order 48; flight vent valve system fabrication, test and vacuum seal delays, which in turn delayed the VGSE fabrication and test; and, the flight lots of schedule critical high power diodes was over stressed during up-screening burn-in. Although, recovery plans are in place to resolve these problems within the current program schedule, including rapid replacement of the high power diodes, the time required to up-screen the replacement diodes for flight use required rearrangement of the Flight PSMC activities and resulted in consuming all of the schedule margin in providing the PSMC on projected program need date.

1.1.7.1 Power Supply & Mechanisms Controller

The printed wiring board solderability issue that was discussed in last month's report has not reappeared since the additional cleaning/defluxing steps were added. This matter is now considered closed.

All internal and box-external PSMC connectors have now completed pre-assembly vacuum conditioning bakeout.

Two lots of 1N6689 diodes were overstressed and/or burned up during Group A electrical screening burn-in at an outside vendor (DPA Labs). MIL-STD-750, method 1038 allows but does not require piece part heat sinking during the High Temperature Reverse Bias burn-in. Both lots were subjected to a non-heat sinked High Temperature Reverse Bias burn-in, resulting in a thermal run away condition that rendered both lots unusable. Although the burn-in was performed in accordance with MIL-STD-750, these particular parts should have been heat sinked to prevent the thermal run away from occurring. Brian Klatt, MIT Product Assurance, assisted with the failure diagnosis while on travel in the Los Angeles area.

Replacement 1N6689 diodes were located, with delivery dates to the screening vendor (DPA Labs) expected early in the next reporting period. Expedited screening completion is targeted for mid August. This screening failure will likely have approximately a 3 week schedule impact on the flight PSMC completion date, pending successful completion of mid August group A electrical testing on the new lot of 1N6689's.

The flexure mount induced mechanical redesign of the PSMC is well underway. Stress analysis shows the 4-point flexure mount can be made fail-safe, while staying within the estimated weight growth to implement this change. In addition to base modifications, the PSMC sides will also need to be beefed up to carry higher loads. An expedited procurement is being set up to allow machined details to be available to meet PSMC Flight Unit mechanical assembly. The PSMC base drawing should be released early in the next reporting period, with sides and lid following by mid August.

In spite of the progress made this month, the box mechanical part machining activities may still represent the schedule limiting element enabling box-level assembly and testing of the fight PSMC. This continues to represent a concern as of the end of this reporting period.

Other progress includes:

There are no changes to the MIT load table during this reporting period.

Radiation

All piece part radiation testing is now complete.

1.1.7.2 Thermal/Mechanical Design and Testing

Flight Detector Housing Fabrication/Test Status

The Detector Housing was pulled out of vacuum this month for early alignment using the pre-ground shims. The in-house Zeiss 3 axis coordinate measuring machine repairs were completed so that the alignment could be performed at LMA. The alignment activity went smoothly and the final shim dimensions were determined. Final grinding and match drilling of the shims to the drill template will occur in early August. Since the need date for the detector housing has been delayed by MIT, a post shim grinding alignment verification will be performed prior to final cleaning and 1238 certification.

TCS Fabrication/Test Status

The radiators, mounting hardware, thermal straps, and sun shade support posts are all in the 1238 chamber for pre-bake, 1238 certification will occur in early August. The sun shade and telescope shades are ready to be shipped to Ball for 1238 certification pending chamber availability.

Thermal Analysis

No progress to report.

SIM Simulator Status

The heaters were bonded onto the SIM Sim panels this month and spot bonding of the wires was completed. Fit checks were completed with the detector housing and SIM Sim shipping container. The connectors, which have already been pre-baked, will be installed in early August. Final cleaning, proof test, and bake out will follow.

StarSys Actuator Status

Starsys actuator S/N 005 was X-rayed at Ball Aerospace for Starsys research and showed similar findings to the previous X-rays performed at LMA. Starsys determined that is was necessary to disassemble the suspect actuator and will rebuild the actuator after inspection of the O-ring is completed. The applicable acceptance testing will be performed after the actuator has been repaired (including X-rays inspection) so the actuator can be upgraded to flight spare status. The MARS is still open on this actuator pending a final disposition. on.

Mechanism Life Cycle Test Reports

The mechanism life cycle test reports were complete and are in review.

1.1.7.3 Venting Subsystem

The venting subsystem was successfully assembled and vibration tested. All functional tests were passed with margin. A significant improvement in the cleaning of the vacuum sealing elements had to be developed obtain a proper seal. This required significant effort to develop and implement the improved cleaning process. However, as a result, the critical leak tests showed no significant leakage. This result was corroborated by no observed pressure increase in the venting subsystem over the three day vibration test.

The venting subsystem will now be prepared for 1238 bakeout and certification. The bakeout schedule is dependent on chamber availability but is planned to begin in August.

1.1.7.4 Mechanical Ground Support Equipment

The Remote Valve Assembly (RVA) was completely assembled. There is still some final staking left but this will be completed after VGSE functional testing.

The assembly of the Vacuum Control Unit (VCU) was delayed due to the extra effort required on the Venting Subsystem assembly and testing but is now underway. The pumps are being mounted into the enclosure so that vacuum assembly can commence. The wiring and assembly of the front and rear control panels was nearing completion and assembly completion of the VCU is anticipated for mid August.

Alignment

The alignment of the flight detector housing was performed as discussed above.

1.1.7.5 Engineering Specialties

Contamination Control

Continued development drawing notes and process to identify specific points in the manufacturing flows for vacuum baking of hardware. Completed baking of Lincoln Labs chamber cables in support of upcoming testing planned at MIT. Started baking the TCS hardware.

EMI/EMC

Started the on-project review of the EU#2 EMI test report. Incorporation of comments and release to the program is expected during the next reporting period.

System Safety

Completed the final review version of the System Safety Analysis report and initiated the final review process. The report will be submitted to MIT in early August.

Parts, Materials and Processes

Continued support of drawings release. Attended table top and drawing signature reviews. Continued tracking of parts, materials and processes identification on MIT drawings. Continued the preparation and submittal of Program MUA's and support of MSFC-SPEC-1443 testing.

Reliability

Incorporation of the MSFC comments into the ACIS FMEA nearing completion. This document update is expected to be released in final form during the next reporting period

1.1.7.6 System Engineering

The systems engineering group continued its support of the ACIS program throughout this reporting period. Requirements were updated and baselined, monitoring the systems design for compatibility with interfacing hardware continued, and engineering specialties activities continued to support of the flight engineering release schedule.

Support of flight hardware fabrication and assembly remains the primary focus for this group. The flight Detector Housing, Venting Subsystem and Thermal Control System assembly and test are nearing completion. These hardware items will be partially disassembled and MSFC-SPEC-1238 certified during the next reporting period. Preparation of verification reports has started.

Compatibility analyses of PSMC to the Detector Housing and Venting Subsystem is completed. Proper operation and pin-to-pin compatibility of these interfaces are assured.

Requirements Identification and Tracking

The ACIS PTS Specification, PTS to DPS ICD, and Focal Plane to Detector Housing ICD were signed and baselined during this reporting period. Additionally, the GSE Specification was signed and baselined during this reporting period.

Update of the GSE to ACIS and Facilities ICD process continued during this reporting period. A draft version of this ICD release was released. This effort is projected for completion on or about in early August.

System Design

ACIS System Schematics development continues during this reporting period. This is a significant task an is projected for completion in September.

Compatibility analysis continued during this month. Interfaces between the PSMC and Detector Housing/Venting Subsystem were analyzed. All incompatibilities were identified and corrected. The interface schematics developed from this analysis effort were provided to TRW for their on-going ESD analyses tasks.

Test Planning and Coordination

Continued surveillance of program scheduling and update of the ground processing flows for testing of ACIS instrument flight hardware throughout July. LMA continues to maintain the ACIS component and system level test flows as a matter of normal business. An update of the ACIS Verification Requirements and Specification Document SVR02 is planned for release during the next performance period.

Supported on-project reviews and provided liaison with MIT and NASA/MSFC for review, comment incorporation, and approval of formal verification test procedures.

Verification

Review of program activities and scheduling of the PTS and ACIS verification events continued throughout July. This activity confirms that the instrument meets requirements and will be ready for delivery to NASA/MSFC at the completion of design, build, and test. LMA continues to perform this activity as a matter of normal business.

1.2 Problems

Schedule remains the most significant management problem.


2.0 ACIS Power Summary

Tables 2-1 through 2-11 summarize our current understanding of the power requirements. This table is the same as that reported in June.

Table 2-1 Power Load Table
Max Input Voltage (V) 29.00
Min Input Voltage (V) 22.00

DEA 5V DEA -5V DEA 15V DEA -15V DEA 24V DEA 28V DPA 5V DH HTR PSMC MC * PSMC Internal **
Vo Operating Mode (V) 6.00 -6.00 15.50 -15.50 24.00 28.00 5.00 29.00 34.00 28.50
Operating Mode Regulation (%) 5.00 5.00 5.00 5.00 5.00 5.00 5.00 1.00 0.00 22.89
Vo Standby Mode (V) 6.00 -6.00 15.50 -15.50 24.00 28.00 5.00 29.00 34.00 28.50
Standby Mode Regulation (%) 10.00 10.00 10.00 10.00 10.00 10.00 10.00 1.00 0.00 22.89
Vo Bakeout Mode (V) 6.00 -6.00 15.50 -15.50 24.00 28.00 5.00 29.00 34.00 28.50
Bakeout Mode Regulation (%) 10.00 10.00 10.00 10.00 10.00 10.00 10.00 10.00 10.00 22.89
Max. Output Ripple (mV, P-P) 100 100 100 100 100 100 100 100 NA NA
Max. Vo Trans. + Ripple (mV, P-P) 200 200 200 200 200 200 200 200 NA NA
Max Operating Mode Current (A) 2.14 0.82 0.44 0.31 0.11 0.15 11.55 0.29 0.00 1.56
Min Operating Mode Current (A) 1.93 0.74 0.40 0.28 0.10 0.13 10.40 0.03 0.00 1.71
Max Standby Mode Current (A) 0.22 0.12 0.01 0.01 0.00 0.15 1.82 0.29 0.00 1.14
Min Standby Mode Current (A) 0.20 0.11 0.01 0.01 0.00 0.13 1.63 0.03 0.00 1.22
Max Bakeout Mode Current (A) 0.22 0.12 0.01 0.01 0.00 1.40 1.82 1.81 0.00 1.68
Min Bakeout Mode Current (A) 0.20 0.11 0.01 0.01 0.00 1.26 1.63 0.00 0.00 1.47
OVP Requirement (V) 7.25 -7.25 18.00 18.00 28.00 35.00 6.00 NA NA NA
Max. Fault Current (A) 5.00 2.50 0.40 0.40 0.58 0.86 11.00 NA NA NA
Max. Load Capacitance (uF) 400 400 1000 1000 500 200 200-1400 NA NA NA
Max. Load Inductance (uH) <1 <1 <1 <1 <1 <1 5-40 NA NA NA
Max Operating Mode Power (W) 13.50 5.18 7.21 5.06 2.83 4.32 60.64 8.50 0.03 61.62
Min Operating Mode Power (W) 10.99 4.22 5.87 4.12 2.30 3.52 49.38 0.85 0.00 53.87
Max Standby Mode Power (W) 1.47 0.78 0.19 0.19 0.00 4.53 9.99 8.50 0.00 49.33
Min Standby Mode Power (W) 1.08 0.58 0.14 0.14 0.00 3.33 7.36 0.85 0.00 43.04
Max Bakeout Mode Power (W) 1.47 0.78 0.19 0.19 0.00 43.12 9.99 52.56 0.00 64.91
Min Bakeout Mode Power (W) 1.08 0.58 0.14 0.14 0.00 31.75 7.36 0.00 0.00 48.66
Preload (W) 2.65 2.65 0.24 0.24 1.15 3.81 5.51

DEA Preload total (W) DEA 28V Preload total (W) DPA Preload total (W)
6.93 3.81 5.51

**Method of calculating min mode currents uses min input bus voltage. This may result in min PSMC internal currents greater than max internal currents. However, this yields true min power dissipation calculations.

Table 2-2. Max and Min Power Dissipation Table
DEA_Dis DPA_Dis PSMC_Dis FP_Dis DH_Dis Total
Maximum Operating Dissipation 34.86 60.64 61.62 3.24 8.50 168.87
Minimum Operating Dissipation 28.39 49.38 53.87 2.64 0.85 135.12
Maximum Standby Dissipation 3.76 9.99 49.33 3.40 8.50 74.97
Minimum Standby Dissipation 2.77 7.36 43.04 2.50 0.85 56.51
Maximum Bakeout Dissipation 13.41 9.99 64.91 32.34 52.56 173.21
Minimum Bakeout Dissipation 9.87 7.36 48.66 23.81 0.00 89.70
Maximum Off Dissipation 0.00 0.00 6.21 0.00 0.00 6.21

Table 2-3. PSMC Power Supplies ONLY - Nominal
PWR Sppl'd by DPA PS PWR Sppl'd by DEA PS PWR Sppl'd by DEA28 PS W/ Preload DPA PS eff PL W/O Preload DPA PS eff W/ Preloads DEA PS eff PL W/O Preloads DEA PS eff W/ Preloads DEA28 PS eff PL
Max Operating Power Dissipation 57.75 W 32.17 W 4.12 W 73% 79% 63% 72% 32%
Min Operating Power Dissipation 51.98 W 28.96 W 3.70 W 72% 78% 61% 72% 30%
Max Standby Power Dissipation 9.08 W 2.39 W 4.12 W 36% 46% 17% 34% 32%
Min Standby Power Dissipation 8.17 W 2.15 W 3.70 W 33% 43% 16% 32% 30%
Max Bakeout Power Dissipation 9.08 W 2.39 W 39.20 W 36% 46% 17% 34% 71%
Min Bakeout Power Dissipation 8.17 W 2.15 W 35.28 W 33% 43% 16% 32% 70%

Table 2-4. Design Feature Table
MC
MC_Impedance 46600.00 ohm
VV_Load_Impedance 75000.00 ohm
DPA
DPA_Impedance 2300.00 ohm
DEA
DEA_Impedance 2300.00 ohm
Comp_DEA_Eff 70%
DH
DH_Impedance 2300.00 ohm
DH_Load_Impedance 16.00 ohm
General
Contact_Resistance 0.02 ohm
Serial_Digital_Load 291.50 ohm
FP_Thermal_Cntl_Eff 75%
DH_Thermal_Cntl_Eff 75%
Off_Resistance 135.47 ohm
DH_OP_Load_Duty 16.2%
DH_BO_Load_Duty 100%
Min_DH_HTR_w_6ccds 10%

Table 2-5. ACIS Efficiency Table
DEA and DPA Power Supply Efficiency Table DHTC Efficiency Table
DH_eff
DPA PS Max Load Eff 80% Max_Operating_eff 65%
DPA PS Bias Power 10 W Min_Operating_eff 55%
DPA PS Max Load 65 W Max_Standby_eff 65%
DEA PS Max Load Eff 75% DEA28 PS Max Load Eff 75% Min_Standby_eff 55%
DEA PS Bias Power 4 W DEA28 PS Bias Power 4 W Max_Bakeout_eff 80%
DEA PS Max Load 52 W DEA28 PS Max Load 30 W Min_Bakeout_eff 70%

TABLE 2-6. Current Inefficiencies in PSMC (including inefficiencies due to Preloads)
DEA 5V DEA -5 DEA 15V DEA -15V DEA 24V DEA 28V DPA 5V DH 29V
Max Operating Mode 0.794 A 0.457 A 0.169 A 0.135 A 0.074 A 0.199 A 3.217 A 0.158 A
Min Operating Mode 0.739 A 0.436 A 0.158 A 0.127 A 0.071 A 0.197 A 3.106 A 0.016 A
Max Standby Mode 0.303 A 0.277 A 0.058 A 0.058 A 0.046 A 0.199 A 2.281 A 0.158 A
Min Standby Mode 0.297 A 0.273 A 0.058 A 0.058 A 0.046 A 0.197 A 2.263 A 0.024 A
Max Bakeout Mode 0.303 A 0.277 A 0.058 A 0.058 A 0.046 A 0.450 A 2.281 A 0.453 A
Min Bakeout Mode 0.297 A 0.273 A 0.058 A 0.058 A 0.046 A 0.422 A 2.263 A 0.000 A

Table 2-7. Power Inefficiencies in PSMC (including inefficiencies due to Preloads)
DEA 5V DEA -5 DEA 15V DEA -15V DEA 24V DEA 28V DPA 5V DH 29V Total
Max Operating Mode 4.77 W 2.74 W 2.62 W 2.09 W 1.78 W 5.58 W 16.08 W 4.58 W 40.25 W
Min Operating Mode 4.44 W 2.61 W 2.44 W 1.97 W 1.72 W 5.50 W 15.53 W 0.46 W 34.67 W
Max Standby Mode 1.82 W 1.66 W 0.90 W 0.90 W 1.10 W 5.58 W 11.40 W 4.58 W 27.95 W
Min Standby Mode 1.78 W 1.64 W 0.90 W 0.90 W 1.10 W 5.50 W 11.32 W 0.70 W 23.84 W
Max Bakeout Mode 1.82 W 1.66 W 0.90 W 0.90 W 1.10 W 12.60 W 11.40 W 13.14 W 43.53 W
Min Bakeout Mode 1.78 W 1.64 W 0.90 W 0.90 W 1.10 W 11.82 W 11.32 W 0.00 W 29.45 W

Table 2-8. Preload Resistance
DEA_5V DEA_-5V DEA_15V DEA_-15V DEA_24V DEA_28V DPA_5V
Preload (Ohms) 15.0 15.0 1105.0 1105.0 550.0 227.0 10.0

Table 2-9. Current Dropped in Power Supply NOT including preloads
DEA 5V DEA -5 DEA 15V DEA -15V DEA 24V DEA 28V DPA 5V DH 29V
Max Operating Mode 0.681 A 0.344 A 0.165 A 0.131 A 0.062 A 0.172 A 3.111 A 0.158 A
Min Operating Mode 0.627 A 0.323 A 0.154 A 0.123 A 0.059 A 0.169 A 3.000 A 0.016 A
Max Standby Mode 0.190 A 0.164 A 0.054 A 0.054 A 0.033 A 0.172 A 2.175 A 0.158 A
Min Standby Mode 0.184 A 0.161 A 0.054 A 0.054 A 0.033 A 0.169 A 2.157 A 0.024 A
Max Bakeout Mode 0.190 A 0.164 A 0.054 A 0.054 A 0.033 A 0.423 A 2.175 A 0.453 A
Min Bakeout Mode 0.184 A 0.161 A 0.054 A 0.054 A 0.033 A 0.395 A 2.157 A 0.000 A

Table 2-10. Power Losses in PSMC NOT including preloads
DEA 5V DEA -5 DEA 15V DEA -15V DEA 24V DEA 28V DPA 5V DH 29V Total
Max Operating Mode 4.09 W 2.06 W 2.56 W 2.03 W 1.49 W 4.82 W 15.55 W 4.58 W 37.18 W
Min Operating Mode 3.76 W 1.94 W 2.38 W 1.91 W 1.42 W 4.74 W 15.00 W 0.46 W 31.60 W
Max Standby Mode 1.14 W 0.98 W 0.84 W 0.84 W 0.80 W 4.82 W 10.87 W 4.58 W 24.88 W
Min Standby Mode 1.11 W 0.96 W 0.84 W 0.84 W 0.80 W 4.74 W 10.79 W 0.70 W 20.77 W
Max Bakeout Mode 1.14 W 0.98 W 0.84 W 0.84 W 0.80 W 11.84 W 10.87 W 13.14 W 40.46 W
Min Bakeout Mode 1.11 W 0.96 W 0.84 W 0.84 W 0.80 W 11.06 W 10.79 W 0.00 W 26.39 W

Table 2-11. Nominal Power Supplied by DEA and DPA Power Supplies to DEA and DPA Load
DEA 5V DEA -5 DEA 15V DEA -15V DEA 24V DEA 28V DPA 5V Total
Max Operating Mode 12.86 W 4.94 W 6.87 W 4.82 W 2.69 W 4.12 W 57.75 W 94.04 W
Min Operating Mode 11.57 W 4.44 W 6.18 W 4.34 W 2.42 W 3.70 W 51.98 W 84.64 W
Max Standby Mode 1.33 W 0.71 W 0.17 W 0.17 W 0.00 W 4.12 W 9.08 W 15.59 W
Min Standby Mode 1.20 W 0.64 W 0.15 W 0.15 W 0.00 W 3.70 W 8.17 W 14.03 W
Max Bakeout Mode 1.33 W 0.71 W 0.17 W 0.17 W 0.00 W 39.20 W 9.08 W 50.67 W
Min Bakeout Mode 1.20 W 0.64 W 0.15 W 0.15 W 0.00 W 35.28 W 8.17 W 45.60 W

3.0 Mass Properties


4.0 Electrical Power

Electrical power requirements (Watts) are summarized in the following table:

ACIS Power Distribution

DEA DPA D.H.Htr PSMC Total
Peak power distribution
in Standby Mode
28.86 7.45 0 15.58 51.89
Peak power distribution
in Max. Operating Mode
53.54 49.72 6.7 46.37 156.33
Peak power distribution
in Bakeout Mode
43.96 7.45 57.6 48.7 157.71
Peak power distribution in
Normal Operating Mode*
41.79 49.72 6.7 46.37 144.58
* Peak Nominal Operating Mode power to be entered into the CEI Spec.

Note: Normal operating mode refers to the ACIS operating with six analog chains at full power, six front-end processors at full power, one back-end processor at full power and the focal plane temperature being maintained at -120°C.


5.0 Software Schedule Status

Reported separately.


6.0 Non conformance Summary

None.